Modern electronics, e.g., smart phones, laptop computers, desktop computers, etc., conventionally operate based on specified timing so that the movement of data and commands in and out of the devices and within the devices operate in a controlled and predictable fashion. The timing in which these systems operate is typically based on a system clock operating at a specific frequency that is provided to all or most of the components of the system. The various interconnected components may then use the clock at the received frequency or at various derivatives of that frequency.
The various components of a system will receive commands and data signals based on the system clock. Some of the components may operate internally at a derivative rate based on the system clock and as such may convert the command/data signals into other timing domains. As part of this conversion process, the signals may be transferred from the system timing domain to the internal timing domain of the component. Additionally, some of the components may have various internal timing domains that the signals traverse and which would also require transfer of signals between the internal timing domains.
During the transfer of signals between timing domains, signals may be “lost” in the process, e.g., the signal may not make the transfer from one timing domain to a next. A lost signal may be one that is lost while in transfer between the timing domains due to inadequacies within the transfer process. For example, a signal presented to the receiving domain when that receiving domain is in the midst of transitioning to a next state (e.g., a high logic level) where the presented signal was not received before or after this next state boundary (e.g., before or after the transition) resulting in the “loss” of the presented signal. Once a signal is lost in the transfer process, all of the subsequent signals until a system reset may be out of place compared with an overall expected sequence. For example, if a command is lost during transfer, the data associated with that command may become associated with the next command, and so on down the sequence. An additional mechanism for upsetting the expected sequence of signals being transferred between two timing domains may include transferring a signal more than once. As with a lost signal, the same signal transferred multiple times may cause the processing of a sequence of events to fail to align with the expected sequence of events and may potentially result in lost information as well.